1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to an improvement of trench isolation.
2. Description of the Related Art
In a semiconductor integrated circuit, an element isolation technique is very important in view of degree of integration, and circuit characteristics. In conventional p-n junction isolation generally performed for a bipolar integrated circuit, an area of an isolation region and a parasitic capacitance are undesirably increased.
On the contrary, a trench isolation structure in which a trench is formed in a semiconductor substrate, and a dielectric material is buried therein is recently proposed. In this isolation structure, it is necessary that an impurity layer for preventing inversion is formed in a bottom portion of the trench to prevent decrease in leakage and breakdown voltage between elements. In this case, an impurity may be doped not only in the bottom portion of the trench but also in side walls of the trench. Therefore, since elements are adversely affected, this disadvantage must be eliminated.
FIGS. 1A to 1C show steps in manufacturing a conventional trench isolation structure in consideration of the above points.
Referring to FIG. 1A, n.sup.+ -type buried layer 2 is formed on p-type Si substrate 1. Then, n-type layer 3 is epitaxially grown to obtain a semiconductor wafer. This wafer is thermally oxidized to form SiO.sub.2 film 4, and Si.sub.3 N.sub.4 film 5 is deposited thereon by CVD (chemical vapor deposition). Thick SiO.sub.2 film 6 is formed on film 5 by CVD. Then, an opening for forming a trench is formed in SiO.sub.2 film 6 using a photoresist mask (not shown). Selective ion etching is performed using SiO.sub.2 film 6 as a mask by reactive ion etching to form trench 7. In reactive ion etching, a polymer is attached to an inner surface of trench 7. However, this polymer is removed by an aqueous solution of NH.sub.4 F.
Referring to FIG. 1B, SiO.sub.2 film 8 having a thickness of about 250 .ANG. is formed on the inner surface of trench 7 by thermal oxidation. After polycrystalline silicon is deposited, reactive ion etching is performed on the entire surface of film 8 and polycrystalline silicon film 9 remains on the side walls of trench 7. Boron ions are implanted in a bottom portion of trench 7 to form p.sup.+ -layer 10 serving as an inversion preventive layer. In this ion implantation, by using Si.sub.3 N.sub.4 film 5 and polycrystalline silicon film 9 as masks, p.sup.+ -layer 10 is selectively formed on only the bottom portion of trench 7.
After Si.sub.3 N.sub.4 film 5 and polycrystalline silicon film 9 are removed, as shown in FIG. 1C, SiO.sub.2 film 10a is formed on the entire surface of the wafer including an inner space of the trench by thermal oxidation. Then, polycrystalline silicon layer 1Ob serving as a dielectric material layer is buried in trench 7. The surface of polycrystalline silicon layer 10b is finally covered with a thermal oxide film (not shown) to complete the trench isolation.
In this conventional method of forming a trench isolation, in order to selectively implant an impurity only on the bottom portion of trench 7, the following operations are necessary, that is, a process for forming SiO.sub.2 film 4 formed by thermal oxidation and Si.sub.3 N.sub.4 film 5 as a mask on the wafer, and a process for forming SiO.sub.2 film 8 on the side walls of the trench. However, large stress is concentrated at on the upper corners of trench 7 due to differences in viscosity and thermal expansion coefficient between Si.sub.3 N.sub.4 film 5 SiO.sub.2 film 4 and between Si.sub.3 N.sub.4 film 5 and the SiO.sub.2 film 6. Since the concentration of the stress causes dislocation, it is difficult that SiO.sub.2 film 8 formed on the side walls of the trench has a thickness, of e.g., about 1,000 .ANG. by thermal oxidation. Therefore, as described above, the thickness of SiO.sub.2 film 8 is about 250 .ANG., and polycrystalline silicon film 9 is selectively formed on the side walls of film 8. However, this method undesirably complicates the process.
In the conventional arrangement as described above, it is considered that an SiO.sub.2 film is formed in place of Si.sub.3 N.sub.4 film 5. By this formation, although concentration of the stress can be eliminated to some extent, it is not satisfactory. Since the thermal oxide film is grown while extending under the thick CVD SiO.sub.2 film, dislocation also occurs in thermal oxidation.
In the conventional method, a polymer removal process by NH.sub.4 F is performed after the trench is formed. At this time, an SiO.sub.2 film is side-etched to expose a substrate on the corner portions. As a result, in the following ion implantation steps, an unnecessary p-type inversion layer is undesirably formed in an element region, thereby increasing a leak current of the element, and decreasing a breakdown voltage.